Electronic Device & Circuit | Exam Paper | 2074 [2018] | RE-COE501 | SEE

SEE - 2074 (2018)
ELECTRONIC DEVICE & CIRCUIT
RE-COE501
Time: 1hr 15 minutes
Full Marks: 40
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Candidates are required to give their answer according to the given instructions.
Group 'A'
Attempt any ten questions. [10x1=10]
1. Define matter?
2. What is rms value?
3. Draw a symbolic diagram of variable and fixed resistor.
4. What is the radius of an electron?
5. Define intrinsic semiconductor.
6. Name any two semiconductor material.
7. Define D.C. power supply.
8. What is the rectification efficiency of full-wave rectifier?
9. Define α.
10. Define transistor.
11. Draw the symbolic diagram of PNP transistor.
12. Define the term 'drain' in FET.
13. What does JFET stands for?

Group 'B'
Attempt any five questions. [5x2=10]
14. A capacitor has colour band sequence as : yellow, white, grey and white.
Interpret it.
15. For the same order of doping, why does N-type semiconductor exhibits
large conductivity than P-type.
16. What is forward bias? Explain it with suitable diagram.
17. Draw and explain the working principle of half-wave rectifier.
18. Explain the working principle of PNP transistor.
19. Write any two application of UJT.
20. Why FET is called voltage controlled device?

Group 'C'
Attempt any five questions. [5x4=20]
21. Explain how a depletion region is formed in RN junction.
22. Write any four differences between zener breakdown and avalance breakdown effect.
23. Calculate the total current I, load current. Il and zener current Iz in the circuit shown below. How will these values be affected if the source voltage be increased to 70 V?
Calculate Total Current
24. Draw the input and output characteristics curves for a c13 configuration and explain the characteristics.
25. Prove the relationship between α, β and γ where α, β and γ have their usual meanings.
26. Explain the construction of an N-channel JFET. Draw a well-labeled drain characteristics curve of the NJEFT and explain the different regions of operation.
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